Shiv Vats is a Principal Engineer at STMicroelectronics with extensive experience in Design for Test (DFT) methodologies, including scan insertion and ATPG vector generation. They have previously held positions as a Staff Engineer and Senior Project Engineer at STMicroelectronics, as well as a Staff Engineer at Qualcomm and a Senior Software Engineer at Atrenta. Shiv earned a B.Tech in Electronics & Communication Engineering from Guru Gobind Singh Indraprastha University. Their expertise encompasses a range of DFT tools, making them a valuable asset in the field.
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