Sophie Puget has extensive experience in microelectronics, beginning as a PhD student at STMicroelectronics in Crolles from September 2006 to September 2009, where Sophie focused on the technological development of memory devices, including layout, process and electrical characterization, and co-integration of silicon CMOS platforms. During this time, Sophie contributed to four patents and authored twelve scientific publications. Since January 2010, Sophie has been working as a Spice modeling engineer specializing in fully depleted and partially depleted SOI technologies. Academically, Sophie holds a PhD in Microelectronics and a Master's degree in Micro and Nanotechnology from Université de Provence, as well as an engineering degree in Microelectronics from Ecole Polytechnique Universitaire de Marseille and a DEUG in Sciences de la Matière from Université Paul Sabatier.
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