Sylvain CLERC is a seasoned Staff Engineer at STMicroelectronics, with experience since October 1999 as a design R&D project leader, specializing in qualification testchips, specific libraries, demonstrator system design, and ultra-low voltage and radiation-hardened design. Prior to this role, Sylvain CLERC worked as a Memory Generator Designer at Dolphin Integration from August 1995 to September 1999, focusing on generator leaf cell design and custom layout for various memory types, along with validation methodology and teaching automated layout generation in Texas and Israel. Sylvain CLERC holds an Engineer degree in digital electronics from Grenoble INP - UGA, earned between 1991 and 1994, and completed the ENSI competitive examination in Mathematics and Physics at Lycée Champollion Grenoble from 1990 to 1992.
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