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Laurent Varone

Embedded Systems Engineer Specialist In Digital Signal Processing at Swiss Timing

Laurent Varone is an experienced Embedded Systems Engineer specializing in Digital Signal Processing at Swiss Timing Ltd since 2017. Prior to this role, Laurent completed an R&D internship at ROLEX in 2016, during which a master thesis focused on developing an automated system for measuring the amplitude of watch balance wheels using image analysis techniques in MATLAB and C++/OpenCV. Earlier experience includes a position as a Security Officer at Securitas AG while studying. Laurent holds a Master's degree in Communication Systems from EPFL, obtained in 2016, and a Bachelor's degree in the same field from EPFL, completed in 2014. Education was preceded by obtaining Maturité gymnasiale from Collège Claparède between 2006 and 2009.

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Geneva, Switzerland

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Swiss Timing

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For more than forty years, Swiss Timing has been one of the most trusted and innovative names in sport. The timekeeping specialist is constantly extending the evolution of technologies designed to measure and record the performances of the world’s most talented men and women, regardless of their sporting discipline. These cutting-edge innovations include live tracking, motion sensing, and computer vision in addition to Swiss Timing’s unparalleled long-standing services in the areas of timing and scoring as well as data handling.


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201-500

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