Durgesh J

Durgesh J is currently the Director of IC Layout at Synaptics Incorporated, where they lead backend design for various analog and digital projects. They previously held the position of Senior Manager at the same company from 2019 to 2022, overseeing team dynamics and ASICs and SOCs backend implementation. Durgesh's career began as an ASIC Engineer at Qualcore Logic Limited from 2005 to 2007, and they have since gained extensive experience in layout design across multiple companies, including Microsemi Corporation and Sasken Communication Technologies Ltd. Durgesh earned a B.Tech in Electronics and Communication Engineering from Jawaharlal Nehru Technological University and a Diploma in the same field from Government Polytechnic, Warangal.