Jae Won Choi

Jae Won Choi is a Mixed Signal IC Design Engineer at Synaptics Incorporated, specializing in high-speed phase-interpolator, integrator, and duty-cycle correction using FinFet technology, with notable achievements including a patented Quadrature clock generator and designs for SAR ADC and SIMO DC-DC converter. Prior experience includes roles at Texas Instruments as an Analog IC Design Engineer focusing on load-switch and power-mux designs, resulting in four granted patents, and as a Mixed Signal IC Design Verification Engineer developing behavior models for custom Power Management ICs for Intel processors, contributing to an additional patent. Educational qualifications include a Master of Science in Electrical and Computer Engineering and a Bachelor of Science in Electrical Engineering, both from the Georgia Institute of Technology.