Jie Liu

Jie Liu is a highly skilled engineer with extensive experience in ASIC design and verification. Currently serving as a Staff Design Verification Engineer at Synaptics Incorporated since September 2019, Jie previously held the position of Senior Design Verification Engineer. Prior experience includes working at SHANGHAI FUDAN MICROELECTRONICS GROUP CO., LTD from January 2013 to March 2019, where Jie was involved in developing verification test plans, creating testbenches using UVM/SystemVerilog, and designing secure chip components such as memory protection units and tamper detection modules. Jie began their career with an internship at AMD in 2012, focusing on low power design and GPU development. Jie holds both a Master's and a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Shanghai University.