Jie Long is a highly experienced Sr. Analog IC Design Engineer at Synaptics since February 2014, specializing in CMOS circuit design for fingerprint touch sensing products. Previously, Jie served as a Sr. RFIC Design Engineer at Aviacomm, focusing on RF frontend designs for TVWS applications, and at Fujitsu, where broadband LNA design for LTE Advanced applications was a key responsibility. Jie's extensive background also includes a significant tenure at Freescale Semiconductor, where design and implementation of various CMOS components for wireless transceivers were undertaken. Jie holds a Ph.D. in Electrical Engineering from Iowa State University and a Bachelor of Engineering in Electrical Engineering from the University of Electronic Science and Technology of China.
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