JT Chien is a Senior Staff RFIC Designer at 新思國際科技有限公司 since 2022, specializing in RFIC, Wi-Fi, and Bluetooth technology. Prior to this role, JT worked as a Senior Principal RFIC Designer at 安森美半导体 in 2022, and has extensive experience as an RFIC Designer at Novatek Microelectronics Corp. from 2013 to 2022, MuChip from 2011 to 2012, and Richwave from 2010 to 2011. JT holds a Master’s degree in Electrical, Electronics and Communications Engineering from 國立臺灣大學, earned between 2008 and 2010.
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