Vishal Rustagi is a seasoned professional in the field of semiconductor design, currently serving as SOC Lead at Synaptics Incorporated since May 2022. Prior to this role, Vishal held various positions at SanDisk® from August 2011 to May 2022, including ASIC Design Lead and Senior ASIC Design Engineer, focusing on FPGA prototyping and ASIC design. Experience also includes a tenure as Senior Design Engineer at Lofru Technologies, specializing in FPGA-based design, and as Sr. Design Engineer at Freescale Semiconductor, with an emphasis on ASIC RTL design. Early career experience includes a role at the Centre for Development of Advanced Computing as a Design Engineer, working on FPGA-based design. Vishal holds a Master of Science in Microelectronics from the Birla Institute of Technology and Science, a PG Diploma in VLSI Design from the Centre for Development of Advanced Computing, and a Bachelor of Engineering in Electronics and Instrumentation from Maharshi Dayanand University Rohtak.
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