Vivek Oza is a Senior Lead Device Engineer at Tata Electronics, where they collaborate with the Process Integration Team on technology transfer initiatives and contribute to the Wafer Acceptance Test (WAT) Team. Previously, as a TD NAND Device Engineer at Micron Technology, they enhanced NAND array device reliability and performance through statistical analysis and MOSFET technology expertise. Vivek's academic foundation includes a Master of Science in Microelectronics from IIT Madras, where they also served as a Project Associate, analyzing Random Telegraph Noise in SiGe pMOSFET devices. With a diverse blend of industry experience and research exposure, they are dedicated to advancing semiconductor technologies.
This person is not in the org chart
This person is not in any teams
This person is not in any offices