Arjun Nag

Arjun Nag is a Senior Design Verification Lead at Tata Consultancy Services, specializing in ASIC, SoC, and IP design verification. With extensive experience in System Verilog, Verilog, and VHDL, Arjun has developed a deep understanding of verification methodologies, including UVM and OVM. They have a strong background in functional verification and emulation for various projects, including low latency FPGA implementations and complex memory controllers. Arjun holds a B.E. in Electrical & Electronics from Andhra University, an MTech in Digital Systems & Computer Electronics, and is currently pursuing a PhD in Digital IC Design & Verification Methodologies at Jawaharlal Nehru Technological University.