Naveenchandra V is a seasoned Signal Integrity and RF Engineer at Tejas Networks, with over 10 years of specialized experience in hardware design, signal integrity engineering, and high-speed SerDes channel modeling. They have a strong background in power integrity analysis, timing analysis, and electromagnetic simulation, having worked with various high-speed interfaces and standards such as Ethernet IEEE802.3ba/j. Naveenchandra previously held roles as a Senior R&D Engineer and Lead Engineer, and has worked with prominent companies including Wipro Limited and Sienna ECAD Technologies. They earned a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Visvesvaraya Technological University.
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