Charles Lou

Charles Lou has been working in the engineering field since 1993. Charles began their career as a Library Development Engineer at IKOS Systems. Charles then moved to Oki Semiconductor America in 1995 as a CAD Engineer II, where they developed ASIC simulation libraries using IKOS's modeling technique. In 1996, they took a position as a Design Engineer at Philips, where they developed IKOS's libraries for TRIMEDIA Chip and set up the design flow for TRIMEDIA chip verification. In 1997, they moved to Fujitsu as a Design Engineer and was involved in the physical design aspect of T3DX chip design and tape out process. In 1998, they joined Cisco as a Technical Leader, Engineering, where they managed 20M+ worth of EDA tools and licenses and supported ASIC/FPGA design groups across the globe. In 2014, they became a SMTS Design Engineer at AMD. Finally, in 2015 they joined Micron Technology as a CAD Manager, where they developed and supported the DV flow to successfully tape out Micron's first SSD controller ASIC, developed and maintained the revision control (GIT) mechanism, effectively maintained compute farm, and managed the work load and boost job throughput. In 2018, they moved to TenaFe Inc as a CAD Manager.

Charles Lou obtained their Bachelor's Degree in Electrical and Electronics Engineering from East-West University and their Master's Degree in Electrical and Electronics Engineering from the University of Southern California.