Arnav Namdev

Design Verification Engineer Intern

Arnav Namdev is an undergraduate student at Purdue University, pursuing a Bachelor's degree in Computer Engineering with a GPA of 3.94. With experience as an Undergraduate Teaching Assistant for Linear Algebra and ECE 337 - ASIC Design Laboratory at Purdue University, Arnav has contributed to student learning by assisting with ASIC design principles, SystemVerilog debugging, and synthesis errors. Currently, Arnav serves as an Undergraduate Student Researcher at Purdue Vertically Integrated Projects, working on FPGA prototyping and SoC design validation. In addition, a Design Verification Engineer Intern position at Tenstorrent is anticipated to commence in Spring 2026. Educational background includes high academic achievements at Pace Junior Science College and Gundecha Education Academy.

Location

West Lafayette, United States

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