Deepak Chamalla is an experienced SoC Functional Validation Engineer with over 6 years of expertise in post-silicon validation, specializing in DDR5/LPDDR5 memory subsystems and high-speed interface testing. Currently, Deepak works as a Sr Post Silicon Validation Engineer at Tessolve, focusing on memory IP validation. Previously, Deepak was a Post Silicon Validation Engineer at Wipro Technologies, where they conducted stress and stability validation. Deepak holds a Bachelor of Engineering degree in Electrical, Electronics, and Communications Engineering from Sagi Rama Krishnam Raju College of Engineering, graduating with a CGPA of 8.0.
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