Rajesh PR is a Senior Silicon Validation Engineer at Tessolve, having joined in 2024. Previously, they worked as a Hardware Test Engineer at SFO Technologies from 2018 to 2022. Rajesh completed a Diploma in Engineering in Electrical and Electronics Engineering from Aries Polytechnic College between 2015 and 2018, following an NCVT in Electrician from Govt ITI Malampuzha from 2012 to 2014.
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