Ullas H M

Ullas H M is an experienced ASIC Design Engineer 2 currently at Tessolve since February 2020. Prior to this role, Ullas H M served as an IC Verification Engineer at Test and Verification Solutions from March 2018 to February 2020 and completed a VLSI Design and Verification Internship followed by a position as a VLSI Design and Verification Engineer Trainee at Maven Silicon in early 2018. Education includes a Bachelor of Engineering in Electrical, Electronics and Communications Engineering from Sir M Visvesvaraya Institute of Technology, Bangalore (2014-2017) and a Diploma in Technical Education in the same field from Sandur Polytechnic, Bellary (2011-2014).