Chris White

Chris White has extensive experience in integrated circuit design, spanning several prominent companies in the industry. Beginning a career at Motorola from 1988 to 1992, Chris contributed to the design of the 88110 cache control logic. Following this, Chris served as Unit Lead at Cyrix from 1992 to 2000, where an instruction fetch and branch acceleration microarchitecture was developed, leading to significant performance improvements. From 2000 to 2002, Chris worked as an I.C. Designer at Navarro Networks before moving to Cisco Systems from 2002 to 2016 as a Technical Leader, driving the design of high-bandwidth interconnect modules for multi-core network processors. After a subsequent position at eSilicon from 2017 to 2018, Chris has been a Senior Design Engineer at Texas Instruments since 2018. Academic qualifications include a Master’s Degree in Electrical Engineering and a Bachelor’s Degree in Computer Engineering from the University of Illinois at Urbana-Champaign.