SATHISHKUMAR K

Sathishkumar K is a Layout Design Manager with over 7 years of experience in Analog, AMS, and High-speed IO Layout Design, having worked on technology nodes from 180nm to 4nm. They have expertise in various technologies including Low Power DDR, PLL, SERDES, USB2.0, and possess in-depth knowledge of FinFet, FDSOI, and CMOS technologies. Sathishkumar has efficiently managed teams of 5-10 layout engineers while providing technical support to junior engineers. They obtained an Engineer's Degree in Electronics and Communications Engineering from Maharaja Engineering College in 2012 and have held positions at Arasan Chip Systems Inc., ARF Design Pvt Ltd, and currently at Texas Instruments.