Suyash Jain

Suyash Jain has a diverse work experience in the field of design engineering and VLSI mentoring. Suyash started their career as an Assistant Professor at Rajiv Gandhi Prodyogiki Vishwavidyalaya in 2010 and continued in that role until 2011. Later, they joined the same university as an Assistant Professor and VLSI Mentor from July 2013 to June 2015. In 2015, they worked as an Internship Trainee at CDAC ACTS Pune. Since 2016, they have been associated with Truechip, where they started as a Design Engineer and progressed to the roles of Senior Design Engineer, Lead Design Engineer, and currently holds the position of Design Manager, which they assumed in January 2023.

Suyash Jain's education history includes a Bachelor of Engineering from the Institute of Engineering, Jiwaji University, Gwalior, which they obtained between 2005 and 2009. Suyash then pursued a Master of Technology degree in VLSI from Rajiv Gandhi Prodyogiki Vishwavidyalaya from 2011 to 2013. Furthermore, Suyash Jain completed a short-term program in VLSI at CDAC ACTS Pune in 2015, where they obtained a PGDVLSI degree.