Edwin Ow

Edwin Ow is a seasoned Sr. Design Engineer at TSMC since October 2020, with prior experience as a Sr. Physical Design Engineer at Synapse Design Inc. and as a Physical Design Engineer at MediaTek, where the focus included STA, SPICE simulation, and timing derate factors. Previous tenure at Intel Corporation involved roles as a Digital Design Engineer, concentrating on full chip scan related STA and providing solutions for scan and asynchronous timing paths, as well as handling various stages of SoC physical design. Edwin Ow holds a Master of Engineering in Microelectronics and Computer Architecture and a Bachelor of Engineering in Computer Engineering, both from Universiti Teknologi Malaysia.