Hsin-Ping Chen

Hsin-Ping Chen is an accomplished academician and manager at TSMC, holding various positions since December 2014, including Department Manager of the Interconnect Architecture and Patterning Department and a member of the TSMC Academician team, recognized for contributions to semiconductor technology. Prior experience includes roles at Intel Corporation as a Process TD Engineer and Substrate Packaging Engineer, where Hsin-Ping Chen was involved in 7nm technology integration and lead-free solder material recommendations. Earlier career experience includes research at Macronix in nonvolatile memory devices. Hsin-Ping Chen holds a PhD in Materials Science & Engineering from UCLA and both a Master's and Bachelor's degree in Materials Sciences and Engineering from National Cheng Kung University.