Steve Choi

Steve Choi is a highly experienced professional in the field of memory design and engineering, currently serving as SRAM Design, Technical Manager at TSMC since January 2023. Previously, Steve held the position of Sr. Design Manager at Mythic from September 2019 to November 2022, and before that, served as Sr. Manager of Analog Design Engineering at SanDisk, overseeing the Analog Team for 2D/3D NAND Memory Products. Other notable roles include Senior MTS Design Engineer at SPANSION, INC, where responsibilities included designing MirrorBit/FG NOR flash memory, and Manager, Memory Design Engineer at Silicon Storage Technology, leading a team to design advanced MPF+ flash memory technology. Steve's career also includes significant contributions at Advanced Micro Devices/Vantis/Lattice Semi as a Senior Design Engineer, focusing on CPLD and FPGA development. Steve Choi holds degrees from Santa Clara University and the University of Illinois Urbana-Champaign.