Wei-Lun Chen

Wei-Lun Chen is an experienced professional in the fields of machine learning, process engineering, and materials science. Currently serving as a Project Leader at 台積電 since August 2017, Wei-Lun Chen guides projects focused on Machine Learning Assisted Recipe Tuning for advanced semiconductor processes. Previous roles include Senior R&D Process Pathfinding Engineer and R&D Process Pathfinding Engineer, where contributions included the development of machine learning-based methodologies for N2 and beyond module development. Wei-Lun Chen's academic background includes a Master of Engineering in Material Science and Engineering from the University of California, Berkeley, and a Master of Science in Polymer Science and Engineering, along with a Bachelor's degree in Chemical Engineering from National Taiwan University. Prior experience includes work on bioinspired surgical adhesives and dendritic polymers during graduate studies.