Tim Phipps

Tim Phipps has a diverse work experience in the field of engineering, particularly in FPGA and ASIC design. Their most recent role, since September 2023, is as a Lead FPGA Design Engineer at TT Electronics plc. Prior to this, Tim worked as a Contract Design Engineer at Cambium Networks from January 2022 to August 2023, where they focused on noise cancellation, data capture, and optimization for beta testing. Tim also worked as a Contract design engineer at EnSilica from March 2021 to December 2021, contributing to projects involving antenna calibration and integration with ARM R52 CPU. Tim has further experience as a Contract ASIC Engineer at Qualcomm from May 2020 to February 2021, as well as at DisplayLink from August 2018 to April 2020, where they worked on ASIC design and integration tasks. Additionally, Tim has worked as a Contract FPGA Engineer at Cambium Networks from June 2015 to May 2018, where they focused on LDPC decoder redesign, timing generator refactoring, and AES crypto block adaptation. Prior to this, they worked as a Contract ASIC Engineer at Intel Corporation in 2015 and 2013, and at Imagination Technologies in 2012, where they contributed to various tasks including IP integration, synthesis, verification, and bug fixing. Tim's earliest recorded work experience in the provided data is a contract role as an ASIC Engineer at Infineon Technologies from September 2011 to March 2012.

Tim Phipps holds an MSc in Information Systems from the University of Bristol. Tim also has an MEng in Electronic Engineering and a BSc (Hons 2.1) in Engineering Science (Electrical Systems) from the University of Warwick.