William Loh

William Loh is a seasoned mixed-signal integrated circuit design and verification engineer with extensive experience across several prominent companies. They earned a PhD in Electrical Engineering from Stanford University and have worked at Koolchip, DEC, LSI Corporation, Verdura Systems, INVECAS, and currently at Ulkasemi Limited. At Koolchip, they designed and verified mixed-signal blocks for Serdes, while their role at LSI Corporation involved developing ECAD tools and digital-assisted analog circuits. Currently, as a contractor at Ulkasemi Limited, they focus on designing and verifying high-speed SerDes and developing standard-cell libraries.