Manoj Bareja

Manoj Bareja is a seasoned professional in the VLSI domain, specializing in Physical Design and DFT, with over 25 years of experience. Currently serving as the Practice Head at UST, Manoj has previously held key positions at IBM India, AMD, Cerium Systems, and Capgemini, where they led large teams and managed complex projects across various process nodes. Manoj's expertise encompasses areas such as floor planning, timing-driven place and route, and low power designing. They are furthering their education through an Advanced Certificate Training Program in VLSI Design and an MBA from Symbiosis Institute of Management Studies.