Subodh G

Subodh G has over six years of experience in VLSI design and verification, specializing in FPGA development and embedded testing. Currently serving as an Embedded Test Lead at UST, they focus on Intel FPGA validation. Subodh has previously worked at Numiv Research Pvt. Ltd. as an FPGA Developer, and held roles in various capacities including RTL integration at Capgemini Engineering and FPGA Design Engineer at Jay Instruments and Systems. They are pursuing a Master’s degree in Electronics at Veermata Jijabai Technological Institute.