Raaghav Hegde

Raaghav Hegde is a skilled engineer with extensive experience in analog circuit design for low power computing and high-speed applications. Currently serving as a Senior Principal Design Engineer at Vaire Computing, Raaghav has previously held positions as a Principal Design Engineer at Phoelex and Huawei Technologies, where expertise included clock generation circuits, high-performance ADCs, and low noise sampling circuits. Additional experience as a Senior Analog IC Design Engineer at SatixFy Space Systems involved designing components for satellite communication, while a role as Senior RF IC Design Engineer at Analog Devices focused on analog phase-locked loops and high-frequency circuits. Raaghav began a career as a Project Engineer at Wipro Technologies, contributing to network applications testing. Raaghav holds a Master’s degree in Microelectronics System Design from the University of Southampton and a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Manipal Institute of Technology.