Dvor Efrat possesses extensive experience in the semiconductor and automotive industries, with a career spanning roles in project management and engineering. At Valens, Efrat successfully managed automotive projects as both Automotive Projects Manager and VLSI Manager, overseeing the design and verification of multiple chips and leading a team of engineers to address complex technical challenges. Previous roles include Senior ASIC Designer at Infineon, where Efrat was responsible for chip implementation in 90nm technology, and Senior Project Manager at DSP Group, where responsibility included directing VLSI design teams and managing ASIC projects from concept to production. Currently, Efrat serves as Senior Principal Application Engineer at Cadence Design Systems, providing expertise in chip implementation flows. A Bachelor of Science in Electrical Engineering and Computer Science from Tel Aviv University and an MBA from the Technion reinforce Efrat's technical and managerial acumen.
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