LS

Lior Sinay

VP Silicon, IPs & Packaging Technologies at Valens Semiconductor

Lior Sinay has extensive work experience in the semiconductor industry, starting in 1997 with Fujitsu as a Circuit Design Engineer. After that, they joined Mysticom in 2000 and served as a Team Leader for Analog & Mixed Signal for seven years. In 2007, they transitioned to SCD and worked as a Design Manager for MixSig VLSI. In 2008, Lior joined DSP Group as a Team Leader for Analog & Mixed Signal until 2011. From 2011 onwards, Lior has been associated with Valens Semiconductor, initially as an Analog & Mixed Signal Manager and later as the Director of Circuit & Physical Design. Lior then served as the Director of Custom Design & Physical IPs and is currently holding the role of VP Silicon, IPs & Packaging Technologies.

Lior Sinay pursued a B.Sc degree in Electrical and Electronics Engineering from Tel Aviv University between the years 1995 and 1999.

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Previous companies

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Timeline

  • VP Silicon, IPs & Packaging Technologies

    May 1, 2023 - present

  • Director of custom design & Physical IPs

    May, 2021

  • Director , Circuit & Physical Design

    March, 2017

  • Analog & mixed signal manager

    October, 2011

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