Rakesh R is currently an R&D DSIS Engineer at Valeo, where responsibilities include ensuring the reliability and accuracy of CAD designs and developing methodologies to maintain high CAD quality. Prior experience includes serving as an Engineer Trainee at Valeo, focusing on ENOVIA management and bug tracking using JIRA. Rakesh previously worked as a Graduate Engineering Trainee at CMR Green Technologies Limited, where efforts were directed towards enhancing the quality of recycled aluminum through R&D initiatives. Additional internships include design work at Agar Solutions and research and development at Youth Empowerment Foundation. Rakesh holds a Bachelor of Technology degree in Mechanical Engineering from K.S. Rangasamy College of Technology.
This person is not in any teams
This person is not in any offices