Xiaolei Ding is an experienced software engineer and Python developer currently employed at Verifone since April 2019, where responsibilities include full stack development and maintenance of the Verifone Configuration Management Console, achieving a high level of system automation through agile methodologies. Previously, Xiaolei served as a Software Quality Assurance Lead at Zignage, implementing UI designs, conducting automated testing, and enhancing user experience through custom solutions. Additional roles include data analysis projects at Northwestern University, financial analysis internships at industrial banks such as the Industrial and Commercial Bank of China and Bank of China, and an asset pricing internship at Thomson Reuters. Xiaolei holds a Master of Science in Information Technology from Northwestern University, alongside degrees in Financial Mathematics and Economics.
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