Tim Quelch

Tim Quelch is an experienced engineer currently working at Versent since August 2022, where responsibilities include engineering tasks related to software development. Prior to this role, Tim was a Sessional Academic at the University of Melbourne from August 2020 to August 2022, coordinating workshops in Signal Processing for master's students, while also pursuing a Ph.D. focused on sampling and optimisation algorithms in non-Euclidean spaces. From November 2016 to June 2020, Tim held multiple positions at QUT, including Sessional Academic, where duties involved leading tutorials and workshops in mathematics and electrical engineering, and Program Assistant for the College of Excellence, providing administrative support. Additional experience includes work as a Vacation Researcher at QUT, focusing on parallelising algorithms for GPUs, and as a Vacation Student at CSIRO, simulating heat transfer processes. Tim holds a Bachelor of Engineering (Honours) in Computer and Software Systems and Computational and Simulation Science from QUT, graduated in 2019.