John Cooklis is a seasoned engineering professional with extensive experience in embedded systems, FPGA development, and software engineering. Currently serving as an Engineering Architect at Waites since May 2022, John has previously held positions including Senior Software Engineer at Polaris Sensor Technologies, Inc., where expertise in HDL (Verilog) for FPGA-based systems was demonstrated. John's background includes roles as Principal Electrical Engineer at Raytheon, where development in VHDL and Python occurred, and as a Mobile App Developer and Staff Engineer at Vertiv Co., highlighted by leadership in the development of mobile applications. Earlier experience encompasses positions at Emerson Network Power - Avocent, Integre Technologies, LLC, Intrinsix Corp., and Xerox, contributing to ASIC design, verification, and board development. John holds both Bachelor of Science and Master of Science degrees in Computer Engineering from the Rochester Institute of Technology.
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