Shuo Zhang

Shuo Zhang is a Senior Hardware Engineer at Waymo, specializing in FPGA and ASIC design verification since May 2018. Previously, Shuo worked as a Software Engineer at F5 Networks, focusing on Redis acceleration on FPGA and FPGA design verification from September 2015 to May 2018. Early career experience includes a role as a Hardware Engineer at Oracle, where Shuo contributed to chipset design verification from July 2013 to September 2015. Shuo holds a Master of Science degree from the University of Southern California and a Bachelor's degree from Northeastern University (CN), along with ongoing studies at the University of California, Santa Cruz Extension Silicon Valley.