Tri Tran

Tri Tran is a highly experienced DRAM Staff Design Engineer at Winbond since May 2016, specializing in the design and analysis of digital and analog/mixed signal circuits for sub-micron CMOS DRAM memory products. Previous experience includes working as a Design Engineering Contractor at MoSys, Inc., where Tri focused on Full-Custom SRAM Macro development at 45nm technology, and a tenure as Staff Memory Design Engineer at ARM, concentrating on SRAM design for high-performance and low-power products utilizing 14nm FINFET and 28nm technology nodes. Earlier roles at Sun Microsystems involved developing various memory types for microprocessors, and Tri began the career in IC Design at Aspec Technology. Tri holds a Master of Science in Electrical Engineering from Santa Clara University and a Bachelor of Science in Electrical Engineering and Computer Sciences from the University of California, Berkeley.