Amit Shah is a Design Verification Manager with over 14 years of experience in ASIC and FPGA design cycles, specializing in SOC verification engineering. Currently, at Synapse Design Inc., Amit manages design verification, leveraging expertise from previous roles at Wipro Limited and Synopsys. A VLSI expert, Amit has worked through the entire lifecycle of complex automotive SOCs, focusing on planning, design verification, and post-silicon debugging. Amit holds a PGDVLSI from CDAC and a BE in Electronics and Communication from Rural Engineering College, VTU, Karnataka.
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