Ganesh C

Ganesh C is a Senior VLSI Engineer at Wipro with 7 years of experience in the design, implementation, integration, and testing of FPGA-based systems. They have developed and simulated VHDL/Verilog code and collaborated with hardware developers on new designs. Previously, Ganesh held positions as a Design Engineer at DELOPT, a Digital Design Engineer at Centum Electronics, and a Senior Design Engineer at Sankalp & KPIT Semiconductor. They completed a Master of Technology (MTech) in VLSI Design & Embedded Systems from PESIT and are currently pursuing a Bachelor of Engineering (BE) in Electrical, Electronics and Communications Engineering.