Jafar Umer is a VLSI technical lead at Wipro Technologies, where they are currently involved in signoff multiple blocks on 3nm technology. They hold a Master of Technology (M.Tech.) in VLSI design from S R M University, completed in 2016. Their career includes roles as a Staff Engineer at Infinecs Systems, a Senior STA Engineer at MEYVNSYSYEMS PVT LTD, and a Design Engineer II and Senior Design Engineer at Mirafra Technologies. Previously, they worked as a PD Engineer at BLR LABS PVT. LTD. and as a Trainee Engineer at Seer Akademi.
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