RITIKA MODI

Ritika Modi is a VLSI Design & Integration Engineer with over 6 years of experience in RTL integration, power-aware design, and formal equivalence checking using Synopsys tools. They have successfully managed the integration and clean synthesis of extensive SoC designs and contributed to protocol-level RTL implementations early in their career. Currently pursuing a minor in AI from IIT Ropar, Ritika aims to merge traditional SoC design with AI-driven workflows. Presently, they work as a Senior Engineer at Wipro, focusing on synthesis and logic equivalence checks.