Rushit Shah

Rushit Shah is a Staff Hardware Engineer at XPENG since September 2021, previously serving as a SOC/IP Design Verification Engineer at Intel Corporation from August 2013 to September 2021. At Intel, responsibilities included subsystem and block level design verification for various components such as the Intel Memory Controller, Universal Serial Bus (USB), and several SOC level entities including the Reset Scheduler and Fuse controller block. Rushit holds a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Gujarat University and a Master's degree in Electrical Engineering with an emphasis on VLSI Design and Computer Architecture from the University of Southern California.