Андрей Кущенко is an experienced engineer specializing in RTL design and verification. They worked as a Field-Programmable Gate Arrays Engineer at NKBVS from 2015 to 2021, focusing on image processing and hardware implementations of machine learning algorithms. Previously, they held a similar position at Южный Федеральный Университет from 2014 to 2015, where they developed FPGA firmware and conducted testing on Smart Cards. Currently, they serve as a Verification Team Lead at YADRO, building on their expertise in the verification of RISC-V CPU units, and previously worked as a Verification Engineer at Syntacore. They hold a degree from Южный Федеральный Университет, obtained in 2015.
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