Strelnikov Sergey is a Senior FPGA Engineer currently working at YADRO since 2024. They have a diverse background in FPGA engineering and C/C++ programming, having held roles at various companies including MainConcept, Elecard, and Vishare Technology Ltd. Strelnikov's educational credentials include multiple degrees from Tomsk State University, specializing in hardware development and innovations in electronic engineering. Their experience extends from 2010 to the present, reflecting expertise in video codecs and hardware solutions.
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