Arpit Mishra is a Process Engineer at Yield Engineering Systems since July 2025, where responsibilities include applying engineering and statistical principles to enhance manufacturing processes through experimental design and data analysis. Prior to this role, Arpit served as a Senior Process Technical Associate at the Indian Institute of Technology, Bombay from June 2023 to July 2025 and as a Lecturer in Physics at Rajat Degree College, Shakti Nagar from December 2020 to May 2025. Earlier experience includes a Project Intern position at the Research Designs & Standards Organisation Indian Railways in mid-2016, focusing on technology development for Indian Railways. Arpit holds a Master of Science in Electronics and a Bachelor of Science in Physics, Chemistry, and Mathematics from the University of Lucknow, completed in 2017 and 2015, respectively. Additionally, a Higher Secondary degree in Physics, Mathematics, Chemistry, English, and Hindi was attained at S. R. C. D. SVM Inter College in early 2012.
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