ZeroPoint Technologies uses novel compression approaches to develop and license a memory compression IP block placed on the SoC processor chip to effectively double memory capacity and memory bandwidth.

Semiconductor

ZeroPoint Technologies

ZeroPoint Technologies' headquarters in Gothenburg, Sweden

Angelos Arelakis

Nilesh Shah

Vasileios Spiliopoulos

Evangelos Vasilakis

Yiannis Nikolakopoulos

The Engineering team at ZeroPoint Technologies is responsible for designing and developing cutting-edge memory compression technologies that enhance the efficiency of SoC processor chips. Comprising experts in software and hardware design, the team collaborates to create innovative IP blocks that effectively double memory capacity and bandwidth, ensuring optimal performance and scalability for clients. Their work involves integrating advanced algorithms, ASIC design, and system architecture to push the boundaries of memory solutions in modern computing.

Engineering

The Leadership Team at ZeroPoint Technologies is responsible for setting the strategic direction and vision of the company, driving innovation in memory compression technology, and overseeing the development and commercialization of its IP solutions. Comprising key executives such as the CEO, CTO, and CSO, this team ensures alignment across departments, fosters a culture of collaboration, and guides the company in navigating market opportunities and challenges.

Leadership Team

This department designs and oversees the architectural frameworks and technologies for system infrastructure.

Architecture Services

This department is responsible for designing, coding, and testing software applications and systems.

ZeroPoint Technologies

Org chart

Teams

Engineering

Leadership Team

Architecture Services

Software Development

Offices

ZeroPoint Technologies

Org chart

Teams

Engineering

Leadership Team

Architecture Services

Software Development

Offices

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