Acacia Communications
Xun Zhang is a Principal Engineer at Acacia Communications Inc. since October 2017, specializing in high-speed link modeling and system architecture. Previously, Xun Zhang served as Senior Principal Hardware Engineer at Oracle from October 2013 to October 2017, where responsibilities included leading the SerDes architecture development and extensive work in algorithm development, analog and digital design specifications, and link budget analysis. Prior experience at LSI Corporation from August 2005 to October 2013 involved innovative signal processing for hard disk drives and collaboration across functional groups for system-level consulting. Xun Zhang began the professional journey with an internship at Sony Corporation, focusing on detection schemes for Blu-ray technology. Educational achievements include a PhD in Signal Processing from Carnegie Mellon University and a Master of Engineering in Wireless Communications from Shanghai Jiaotong University.