Chaitali Mankar

Chaitali Mankar is a Design Verification Engineer at AdeptChips since June 2021, bringing experience as a DV Engineer at Leventm Technologies Private Limited from August 2019 to June 2020 and as an intern at SION Semiconductors Private Limited from July 2018 to December 2019. Chaitali holds a Master of Technology (MTech) degree in VLSI Design from Shri Ramdeobaba Kamla Nehru Engineering College, completed between 2016 and 2018.