Akil Kaveti is a seasoned engineering professional with extensive experience in design and verification roles across prominent technology companies. Currently serving as a Senior Member of Technical Staff at AMD since August 2022, Akil previously held the position of Staff Design Engineer at Xilinx, focusing on sub-system verification using UVM and System Verilog from August 2016 to August 2022. Prior experience includes roles as a Graphics Hardware Engineer at Intel Corporation, where functional verification of graphics pipeline units was performed, and leading validation efforts for front-end feature development. Akil also contributed to the functional verification of GDDR5 PHY as a Sr. Design Engineer at AMD from January 2011 to June 2012, and worked on memory controller verification at Chelsio Communications. Akil holds a Master's degree in Electrical Engineering from the University of Kentucky and a Bachelor of Engineering in Electronics and Communication from Osmania University.
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